What is RISC-V?

Even for computing hobbyists, RISC-V is a bit in the weeds, but perhaps not for long. It’s one of the rising stars in the computing world and is one of the most successful (if not the most successful) examples of open-source hardware. It’s predicted that tens of billions of RISC-V cores will be sold over the next few years, a number that would rival the amount of x86 and ARM cores sold in the same time frame. Here’s everything you need to know about RISC-V and where it’s going.


RISC-V: A free and open source instruction set architecture

A render of a RISC-V chip.

Source: Siemens

RISC-V (pronounced “risk five”) is an instruction set architecture (ISA) developed and maintained by RISC-V International (formerly the RISC-V Foundation). An ISA is the starting point of any CPU design and determines fundamental things like basic instructions, what optional instructions may be added, and what kind of software can natively run on the CPU. Additionally, RISC-V is, per its name, a reduced instruction set computer architecture, which basically means its default form comes with very few instructions. ARM is also a RISC design while x86 is a complex instruction set computer design (CISC).

Being a RISC design is more important for RISC-V than ARM being RISC or x86 being CISC because RISC-V has a unique selling point: it’s open source. Any company that wants to use the stock RISC-V design is free to do so and modify it however it wants. As x86 is jointly owned by Intel and AMD, no other company can (legally) make x86 processors, and although companies can make their own version of ARM chips, they not only have to pay Arm the company, but they can’t alter the ISA. With RISC-V, it’s total freedom.

Of course, there are upsides and downsides to this approach. The good news is that there are no licensing fees or restrictions on designs, which is great for companies that want to be as autonomous as possible and reduce development costs. The bad news is that exercising this amount of freedom isn’t easy because designing CPUs isn’t easy. Additionally, companies that make their own RISC-V processors aren’t obligated to share that technology with others, but they can license out designs like Arm does.

A brief history of RISC-V

RISC-V is a strange name. You’d think it was the fifth in a series of RISC ISAs, and although that’s the story behind its name, that’s not exactly accurate. RISC-I and RISC-II were designed in 1981, but RISC-III and RISC-IV aren’t actual ISAs. Instead, they were names applied to two ISAs called SOAR and SPUR, which came out in 1984 and 1988, respectively. There’s no substantial connection between RISC-V and these ISAs from the 80s beyond the fact that they’re all RISC designs.

RISC-V is practically a baby among ISAs. Work on RISC-V commenced in 2010 in Berkeley’s Parallel Computing Lab (or Par Lab for short), which received funding from Microsoft as well as Intel, the creator of the x86 ISA. By 2011, the first RISC-V prototype was ready to be manufactured. RISC-V transformed from a research project into an actual ISA that companies could use in 2014 when David Patterson and Krste Asanović published a paper arguing that open-source hardware was the future and that RISC-V was the ISA to do the job. A year later, the RISC-V Foundation was created.

It’s only been eight years since RISC-V burst onto the scene, and because designing chips can take years alone, it’s hard to evaluate where RISC-V is right now. What we do know is that there are over 3,500 members of RISC-V International, up from 600 at the start of 2020, 1,500 in early 2021, and 2,200 in late 2021. As for actual market share, it’s hard to say, but in May 2023 RISC-V CTO Mark Himelstein claimed “10s of billions” of RISC-V cores had been sold by member companies, which is in line with predictions for 2022 and 2023.

RISC-V’s ambitions to take the CPU market by storm

The SiFive HiFive Unmatched development board.

Source: SiFive

RISC-V International talks a big game when it comes to growth, citing one study that predicts 60 billion RISC-V cores will be sold by 2025 and another that predicts RISC-V’s compound annual growth rate (or CAGR) will be just shy of 35% through 2027. A CAGR of 35% is extremely aggressive and fast in such an established industry, but increasing numbers of companies are seeking to design their own chips, and this is certain to help fuel RISC-V’s growth. Key markets for RISC-V include industrial applications, 5G, and cellular, but also low-end smartphones, PCs, gaming consoles, and servers.

The introduction of RISC-V led to the foundation of companies that deal exclusively in RISC-V chips. SiFive is one of the most visible as the first company to make a RISC-V chip, and has a very similar business model to Arm, licensing out its custom RISC-V designs in order to turn a profit. Today, SiFive advertises its technology’s uses in wearables, cars, and a plethora of other areas. Furthermore, companies that once used other ISAs have made the full transition to using RISC-V; Microsemi, a subsidiary of Microchip, replaced ARM cores in its FPGAs with RISC-V cores.

It’s obvious that RISC-V has a ton of momentum behind it, even if it’s not quite living up to its lofty ambitions.

But there are also companies supporting and using RISC-V that you might not expect. Nvidia, a founding member, attempted to purchase Arm from 2020 to 2022; IBM, another founding member, has its own PowerPC ISA; Qualcomm, also a founding member, is a leading ARM chip designer; and Intel, which was involved in RISC-V’s development and fabbed development chips, made x86, one of the oldest and most important ISAs ever. The thing is, many companies see RISC-V as something that can exist alongside other CPUs and not just a simple replacement for ARM and x86.

Arm, of course, is not a huge fan of RISC-V, and sees the risk of fragmentation as a key reason to not use RISC-V. Fragmentation is when technology standards are loosely or not enforced, and the fear with RISC-V is that since everything can be modified, it could create a hardware ecosystem where not all RISC-V software can run on all RISC-V chips. This is actually already happening as different RISC-V chips for phones don’t all support the same operating systems. Of course, there’s a strong incentive for RISC-V chipmakers to adhere to standards to avoid this very thing, and in the future RISC-V companies will have to be careful about fragmentation.

It’s obvious that RISC-V has a ton of momentum behind it, even if it’s not quite living up to its lofty ambitions. With thousands of members including some of the world’s leading computing companies, universities, and even India’s Ministry of Electronics and Information Technology, it’s hard to see RISC-V not becoming a major player on the computing scene. Perhaps in a few years, people will be arguing about whether ARM or RISC-V is the best for smartphones.


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